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翻訳と辞書　辞書検索 [ 開発暫定版 ] スポンサード リンク Reference Verification Methodology ： ウィキペディア英語版 Reference Verification Methodology The Reference Verification Methodology (RVM) is a complete set of metrics and methods for performing Functional verification of complex designs such as for Application-specific integrated circuits or other semiconductor devices. It was published by Synopsys in 2003. RVM is implemented under OpenVera. The SystemVerilog implementation of the RVM is known as the VMM (Verification Methodology Manual). It contains a small library of base classes. ==References== *(OVM/UVM Verification Methodology ) at the Verification Academy *(Verification Methodology Manual ) for SystemVerilog *(vmmcenter.org ) *(RVM Testbench Example ) 抄文引用元・出典: フリー百科事典『 ウィキペディア（Wikipedia）』 ■ウィキペディアで「Reference Verification Methodology」の詳細全文を読む スポンサード リンク 翻訳と辞書 : 翻訳のためのインターネットリソース Copyright(C) kotoba.ne.jp 1997-2016. All Rights Reserved.